0061-ar71xx-Use-private-version-of-ath79_setup_qca955x_eth_cfg-for-MR1750.patch 1.9 KB

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  1. From: Sven Eckelmann <sven.eckelmann@open-mesh.com>
  2. Date: Wed, 23 Mar 2016 12:52:12 +0000
  3. Subject: ar71xx: Use private version of ath79_setup_qca955x_eth_cfg for MR1750
  4. The MR1750 must unset some bits in ETH_CFG which were set by u-boot to work
  5. correctly under OpenWrt. But the global function
  6. ath79_setup_qca955x_eth_cfg will not unset all of them to increase the
  7. backward compatiblity with older mach-* files. A private (simplified)
  8. version for MR1750 can be used instead.
  9. Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
  10. Backport of r49070
  11. Forwarded: https://patchwork.ozlabs.org/patch/624188/
  12. diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
  13. index f9e45bd..e3c04e7 100644
  14. --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
  15. +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr1750.c
  16. @@ -108,6 +108,28 @@ static struct mdio_board_info mr1750_mdio0_info[] = {
  17. },
  18. };
  19. +static void __init mr1750_setup_qca955x_eth_cfg(u32 mask,
  20. + unsigned int rxd,
  21. + unsigned int rxdv,
  22. + unsigned int txd,
  23. + unsigned int txe)
  24. +{
  25. + void __iomem *base;
  26. + u32 t;
  27. +
  28. + base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
  29. +
  30. + t = mask;
  31. + t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
  32. + t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
  33. + t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
  34. + t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
  35. +
  36. + __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
  37. +
  38. + iounmap(base);
  39. +}
  40. +
  41. static void __init mr1750_setup(void)
  42. {
  43. u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
  44. @@ -129,7 +151,7 @@ static void __init mr1750_setup(void)
  45. ath79_register_wmac(art + MR1750_WMAC_CALDATA_OFFSET, mac);
  46. ath79_register_pci();
  47. - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
  48. + mr1750_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
  49. ath79_register_mdio(0, 0x0);
  50. mdiobus_register_board_info(mr1750_mdio0_info,