gluon/patches/openwrt/0057-ar71xx-Add-QCA955X-GPIO-mux-and-function-definitions.patch

From: Sven Eckelmann <sven.eckelmann@open-mesh.com>
Date: Wed, 23 Mar 2016 12:52:31 +0000
Subject: ar71xx: Add QCA955X GPIO mux and function definitions

Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>

Backport of r49075

Forwarded: https://patchwork.ozlabs.org/patch/624184/

diff --git a/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch
index 797977f..0126f6a 100644
--- a/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch
+++ b/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch
@@ -194,7 +194,7 @@
  #define AR933X_BOOTSTRAP_REF_CLK_40	BIT(0)
  
  #define AR934X_BOOTSTRAP_SW_OPTION8	BIT(23)
-@@ -529,6 +626,12 @@
+@@ -529,8 +626,22 @@
  #define AR71XX_GPIO_REG_INT_ENABLE	0x24
  #define AR71XX_GPIO_REG_FUNC		0x28
  
@@ -206,8 +206,18 @@
 +#define AR934X_GPIO_REG_OUT_FUNC5	0x40
  #define AR934X_GPIO_REG_FUNC		0x6c
  
++#define QCA955X_GPIO_REG_OUT_FUNC0	0x2c
++#define QCA955X_GPIO_REG_OUT_FUNC1	0x30
++#define QCA955X_GPIO_REG_OUT_FUNC2	0x34
++#define QCA955X_GPIO_REG_OUT_FUNC3	0x38
++#define QCA955X_GPIO_REG_OUT_FUNC4	0x3c
++#define QCA955X_GPIO_REG_OUT_FUNC5	0x40
++#define QCA955X_GPIO_REG_FUNC		0x6c
++
  #define AR71XX_GPIO_COUNT		16
-@@ -560,4 +663,170 @@
+ #define AR7240_GPIO_COUNT		18
+ #define AR7241_GPIO_COUNT		20
+@@ -560,4 +671,235 @@
  #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT	13
  #define AR934X_SRIF_DPLL2_OUTDIV_MASK	0x7
  
@@ -288,6 +298,71 @@
 +#define AR934X_GPIO_OUT_EXT_LNA0	46
 +#define AR934X_GPIO_OUT_EXT_LNA1	47
 +
++#define QCA955X_GPIO_FUNC_CLK_OBS7_EN		BIT(9)
++#define QCA955X_GPIO_FUNC_CLK_OBS6_EN		BIT(8)
++#define QCA955X_GPIO_FUNC_CLK_OBS5_EN		BIT(7)
++#define QCA955X_GPIO_FUNC_CLK_OBS4_EN		BIT(6)
++#define QCA955X_GPIO_FUNC_CLK_OBS3_EN		BIT(5)
++#define QCA955X_GPIO_FUNC_CLK_OBS2_EN		BIT(4)
++#define QCA955X_GPIO_FUNC_CLK_OBS1_EN		BIT(3)
++#define QCA955X_GPIO_FUNC_JTAG_DISABLE		BIT(1)
++
++#define QCA955X_GPIO_OUT_GPIO		0
++#define QCA955X_MII_EXT_MDI		1
++#define QCA955X_SLIC_DATA_OUT		3
++#define QCA955X_SLIC_PCM_FS		4
++#define QCA955X_SLIC_PCM_CLK		5
++#define QCA955X_SPI_CLK			8
++#define QCA955X_SPI_CS_0		9
++#define QCA955X_SPI_CS_1		10
++#define QCA955X_SPI_CS_2		11
++#define QCA955X_SPI_MISO		12
++#define QCA955X_I2S_CLK			13
++#define QCA955X_I2S_WS			14
++#define QCA955X_I2S_SD			15
++#define QCA955X_I2S_MCK			16
++#define QCA955X_SPDIF_OUT		17
++#define QCA955X_UART1_TD		18
++#define QCA955X_UART1_RTS		19
++#define QCA955X_UART1_RD		20
++#define QCA955X_UART1_CTS		21
++#define QCA955X_UART0_SOUT		22
++#define QCA955X_SPDIF2_OUT		23
++#define QCA955X_LED_SGMII_SPEED0	24
++#define QCA955X_LED_SGMII_SPEED1	25
++#define QCA955X_LED_SGMII_DUPLEX	26
++#define QCA955X_LED_SGMII_LINK_UP	27
++#define QCA955X_SGMII_SPEED0_INVERT	28
++#define QCA955X_SGMII_SPEED1_INVERT	29
++#define QCA955X_SGMII_DUPLEX_INVERT	30
++#define QCA955X_SGMII_LINK_UP_INVERT	31
++#define QCA955X_GE1_MII_MDO		32
++#define QCA955X_GE1_MII_MDC		33
++#define QCA955X_SWCOM2			38
++#define QCA955X_SWCOM3			39
++#define QCA955X_MAC2_GPIO		40
++#define QCA955X_MAC3_GPIO		41
++#define QCA955X_ATT_LED			42
++#define QCA955X_PWR_LED			43
++#define QCA955X_TX_FRAME		44
++#define QCA955X_RX_CLEAR_EXTERNAL	45
++#define QCA955X_LED_NETWORK_EN		46
++#define QCA955X_LED_POWER_EN		47
++#define QCA955X_WMAC_GLUE_WOW		68
++#define QCA955X_RX_CLEAR_EXTENSION	70
++#define QCA955X_CP_NAND_CS1		73
++#define QCA955X_USB_SUSPEND		74
++#define QCA955X_ETH_TX_ERR		75
++#define QCA955X_DDR_DQ_OE		76
++#define QCA955X_CLKREQ_N_EP		77
++#define QCA955X_CLKREQ_N_RC		78
++#define QCA955X_CLK_OBS0		79
++#define QCA955X_CLK_OBS1		80
++#define QCA955X_CLK_OBS2		81
++#define QCA955X_CLK_OBS3		82
++#define QCA955X_CLK_OBS4		83
++#define QCA955X_CLK_OBS5		84
++
 +/*
 + * MII_CTRL block
 + */
diff --git a/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
index 0e87357..8a54859 100644
--- a/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
+++ b/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
@@ -37,37 +37,12 @@
 +	}
  
 -	if (gpio >= AR934X_GPIO_COUNT)
+-		return;
 +	if (gpio >= gpio_count)
- 		return;
++ 		return;
  
 -	reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
 +	reg = reg_base + 4 * (gpio / 4);
  	s = 8 * (gpio % 4);
  
  	spin_lock_irqsave(&ath79_gpio_lock, flags);
---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
-@@ -875,6 +875,14 @@
- #define QCA953X_GPIO_OUT_MUX_LED_LINK4		44
- #define QCA953X_GPIO_OUT_MUX_LED_LINK5		45
- 
-+#define QCA955X_GPIO_REG_OUT_FUNC0	0x2c
-+#define QCA955X_GPIO_REG_OUT_FUNC1	0x30
-+#define QCA955X_GPIO_REG_OUT_FUNC2	0x34
-+#define QCA955X_GPIO_REG_OUT_FUNC3	0x38
-+#define QCA955X_GPIO_REG_OUT_FUNC4	0x3c
-+#define QCA955X_GPIO_REG_OUT_FUNC5	0x40
-+#define QCA955X_GPIO_REG_FUNC		0x6c
-+
- #define QCA956X_GPIO_REG_OUT_FUNC0	0x2c
- #define QCA956X_GPIO_REG_OUT_FUNC1	0x30
- #define QCA956X_GPIO_REG_OUT_FUNC2	0x34
-@@ -1014,6 +1022,8 @@
- #define AR934X_GPIO_OUT_EXT_LNA0	46
- #define AR934X_GPIO_OUT_EXT_LNA1	47
- 
-+#define QCA955X_GPIO_OUT_GPIO		0
-+
- /*
-  * MII_CTRL block
-  */