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@@ -0,0 +1,85 @@
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+From: Matthias Schiffer <mschiffer@universe-factory.net>
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+Date: Thu, 24 Mar 2016 18:30:26 +0100
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+Subject: ar71xx: make bootconsole wait for both THRE and TEMT
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+
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+Original commit message:
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+
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+ MIPS: ath79: make bootconsole wait for both THRE and TEMT
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+
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+ This makes the ath79 bootconsole behave the same way as the generic 8250
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+ bootconsole.
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+
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+ Also waiting for TEMT (transmit buffer is empty) instead of just THRE
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+ (transmit buffer is not full) ensures that all characters have been
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+ transmitted before the real serial driver starts reconfiguring the serial
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+ controller (which would sometimes result in garbage being transmitted.)
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+ This change does not cause a visible performance loss.
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+
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+ In addition, this seems to fix a hang observed in certain configurations on
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+ many AR7xxx/AR9xxx SoCs during autoconfig of the real serial driver.
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+
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+ A more complete follow-up patch will disable 8250 autoconfig for ath79
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+ altogether (the serial controller is detected as a 16550A, which is not
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+ fully compatible with the ath79 serial, and the autoconfig may lead to
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+ undefined behavior on ath79.)
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+
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+diff --git a/target/linux/ar71xx/patches-3.18/103-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch b/target/linux/ar71xx/patches-3.18/103-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch
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+new file mode 100644
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+index 0000000..7be14ab
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+--- /dev/null
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++++ b/target/linux/ar71xx/patches-3.18/103-MIPS-ath79-make-bootconsole-wait-for-both-THRE-and-T.patch
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+@@ -0,0 +1,54 @@
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++From f1ba020af5076172c9d29006a747ccf40027fedc Mon Sep 17 00:00:00 2001
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++Message-Id: <f1ba020af5076172c9d29006a747ccf40027fedc.1458840219.git.mschiffer@universe-factory.net>
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++From: Matthias Schiffer <mschiffer@universe-factory.net>
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++Date: Thu, 24 Mar 2016 15:34:05 +0100
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++Subject: [PATCH] MIPS: ath79: make bootconsole wait for both THRE and TEMT
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++
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++This makes the ath79 bootconsole behave the same way as the generic 8250
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++bootconsole.
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++
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++Also waiting for TEMT (transmit buffer is empty) instead of just THRE
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++(transmit buffer is not full) ensures that all characters have been
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++transmitted before the real serial driver starts reconfiguring the serial
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++controller (which would sometimes result in garbage being transmitted.)
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++This change does not cause a visible performance loss.
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++
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++In addition, this seems to fix a hang observed in certain configurations on
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++many AR7xxx/AR9xxx SoCs during autoconfig of the real serial driver.
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++
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++A more complete follow-up patch will disable 8250 autoconfig for ath79
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++altogether (the serial controller is detected as a 16550A, which is not
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++fully compatible with the ath79 serial, and the autoconfig may lead to
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++undefined behavior on ath79.)
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++
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++Cc: <stable@vger.kernel.org>
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++Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
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++---
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++ arch/mips/ath79/early_printk.c | 6 ++++--
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++ 1 file changed, 4 insertions(+), 2 deletions(-)
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++
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++diff --git a/arch/mips/ath79/early_printk.c b/arch/mips/ath79/early_printk.c
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++index b955faf..d1adc59 100644
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++--- a/arch/mips/ath79/early_printk.c
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+++++ b/arch/mips/ath79/early_printk.c
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++@@ -31,13 +31,15 @@ static inline void prom_putchar_wait(void __iomem *reg, u32 mask, u32 val)
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++ } while (1);
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++ }
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++
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+++#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
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+++
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++ static void prom_putchar_ar71xx(unsigned char ch)
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++ {
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++ void __iomem *base = (void __iomem *)(KSEG1ADDR(AR71XX_UART_BASE));
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++
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++- prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
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+++ prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
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++ __raw_writel(ch, base + UART_TX * 4);
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++- prom_putchar_wait(base + UART_LSR * 4, UART_LSR_THRE, UART_LSR_THRE);
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+++ prom_putchar_wait(base + UART_LSR * 4, BOTH_EMPTY, BOTH_EMPTY);
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++ }
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++
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++ static void prom_putchar_ar933x(unsigned char ch)
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++--
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++2.7.4
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++
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