Browse Source

Update OpenWrt base

Update kernel to 3.18.23
Matthias Schiffer 8 years ago
parent
commit
7475ef8f14

+ 1 - 1
modules

@@ -1,7 +1,7 @@
 GLUON_FEEDS='openwrt gluon routing luci'
 
 OPENWRT_REPO=git://git.openwrt.org/15.05/openwrt.git
-OPENWRT_COMMIT=f42308c3edc6bb23ce0e5ba3682195842bfbfd5c
+OPENWRT_COMMIT=363508bcabd8e9205f5fffc8ff282439e61d618f
 
 PACKAGES_OPENWRT_REPO=git://github.com/openwrt/packages.git
 PACKAGES_OPENWRT_COMMIT=f8a70fc188673d0ae8739b0a3095f7f61335fc10

+ 9 - 66
patches/openwrt/0019-ar71xx-rework-patch-for-qca953x-956x.patch

@@ -103,7 +103,7 @@ index ae3db4c..ff94e2e 100644
  			break;
  
 diff --git a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
-index b44e884..d541939 100644
+index 5041619..403897a 100644
 --- a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
 +++ b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
 @@ -44,7 +44,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
@@ -594,38 +594,10 @@ index b44e884..d541939 100644
  +++ b/arch/mips/include/asm/mach-ath79/ath79.h
  @@ -32,6 +32,7 @@ enum ath79_soc_type {
 diff --git a/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
-index 8f15790..027163f 100644
+index 491a7aa..2bdc744 100644
 --- a/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
 +++ b/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
-@@ -1,3 +1,27 @@
-+--- a/arch/mips/ath79/Kconfig
-++++ b/arch/mips/ath79/Kconfig
-+@@ -1213,6 +1213,12 @@ config SOC_QCA955X
-+ 	select PCI_AR724X if PCI
-+ 	def_bool n
-+ 
-++config SOC_QCA956X
-++	select USB_ARCH_HAS_EHCI
-++	select HW_HAS_PCI
-++	select PCI_AR724X if PCI
-++	def_bool n
-++
-+ config ATH79_DEV_M25P80
-+ 	select ATH79_DEV_SPI
-+ 	def_bool n
-+@@ -1250,7 +1256,7 @@ config ATH79_DEV_USB
-+ 	def_bool n
-+ 
-+ config ATH79_DEV_WMAC
-+-	depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X)
-++	depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X || SOC_QCA956X)
-+ 	def_bool n
-+ 
-+ config ATH79_NVRAM
- --- a/arch/mips/ath79/clock.c
- +++ b/arch/mips/ath79/clock.c
- @@ -520,6 +520,100 @@ static void __init qca955x_clocks_init(v
-@@ -142,74 +166,9 @@
+@@ -142,74 +142,9 @@
   		ath79_uart_data[0].uartclk = uart_clk_rate;
   		platform_device_register(&ath79_uart_device);
   	} else if (soc_is_ar933x()) {
@@ -701,7 +673,7 @@ index 8f15790..027163f 100644
   			   &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
   }
   
-@@ -229,8 +188,8 @@
+@@ -229,8 +164,8 @@
   void __init ath79_register_usb(void)
   {
   	if (soc_is_ar71xx())
@@ -712,7 +684,7 @@ index 8f15790..027163f 100644
   	else if (soc_is_qca955x())
   		qca955x_usb_setup();
  +	else if (soc_is_qca9561())
-@@ -291,9 +250,9 @@
+@@ -291,9 +226,9 @@
   	    soc_is_ar913x() ||
   	    soc_is_ar933x())
   		reg = AR71XX_GPIO_REG_FUNC;
@@ -724,7 +696,7 @@ index 8f15790..027163f 100644
   		reg = AR934X_GPIO_REG_FUNC;
   	else
   		BUG();
-@@ -326,7 +285,7 @@
+@@ -326,7 +261,7 @@
   		ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
   	else
   		BUG();
@@ -733,7 +705,7 @@ index 8f15790..027163f 100644
   	irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch);
   }
   
-@@ -406,15 +365,13 @@
+@@ -406,15 +341,13 @@
  +
  +	for (i = ATH79_IP2_IRQ_BASE;
  +	     i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++)
@@ -751,7 +723,7 @@ index 8f15790..027163f 100644
  +
  +	irq_set_chained_handler(ATH79_CPU_IRQ(3), qca956x_ip3_irq_dispatch);
  +
-@@ -426,7 +383,7 @@
+@@ -426,7 +359,7 @@
   asmlinkage void plat_irq_dispatch(void)
   {
   	unsigned long pending;
@@ -760,7 +732,7 @@ index 8f15790..027163f 100644
   	} else if (soc_is_qca955x()) {
   		ath79_ip2_handler = ath79_default_ip2_handler;
   		ath79_ip3_handler = ath79_default_ip3_handler;
-@@ -436,37 +393,13 @@
+@@ -436,8 +369,8 @@
   	} else {
   		BUG();
   	}
@@ -771,35 +743,6 @@ index 8f15790..027163f 100644
   	else if (soc_is_qca955x())
   		qca955x_irq_init();
  +	else if (soc_is_qca956x())
- +		qca956x_irq_init();
-  }
----- a/arch/mips/ath79/Kconfig
--+++ b/arch/mips/ath79/Kconfig
--@@ -1248,6 +1248,12 @@ config SOC_QCA955X
-- 	select PCI_AR724X if PCI
-- 	def_bool n
-- 
--+config SOC_QCA956X
--+	select USB_ARCH_HAS_EHCI
--+	select HW_HAS_PCI
--+	select PCI_AR724X if PCI
--+	def_bool n
--+
-- config ATH79_DEV_M25P80
-- 	select ATH79_DEV_SPI
-- 	def_bool n
--@@ -1285,7 +1291,7 @@ config ATH79_DEV_USB
-- 	def_bool n
-- 
-- config ATH79_DEV_WMAC
---	depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X)
--+	depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA953X || SOC_QCA955X || SOC_QCA956X)
-- 	def_bool n
-- 
-- config ATH79_NVRAM
- --- a/arch/mips/ath79/pci.c
- +++ b/arch/mips/ath79/pci.c
- @@ -68,6 +68,21 @@ static const struct ath79_pci_irq qca955
 @@ -519,7 +452,7 @@
   		return -ENODEV;
  --- a/arch/mips/ath79/setup.c

+ 2 - 19
patches/openwrt/0031-ar71xx-fix-ath79_soc_rev-value-for-QCA9531-ver.-2.patch

@@ -10,7 +10,7 @@ As ath79_soc_rev is only used to get the revision number to ath9k on the
 QCA9533, just set it to the expected value on the ver. 2.
 
 diff --git a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
-index d541939..be53a5a 100644
+index 403897a..cf10af3 100644
 --- a/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
 +++ b/target/linux/ar71xx/patches-3.18/707-MIPS-ath79-add-support-for-QCA953x-SoC.patch
 @@ -44,7 +44,7 @@ meaning of the bits CPUCLK_FROM_CPUPLL and DDRCLK_FROM_DDRPLL is reversed.
@@ -140,26 +140,9 @@ index d541939..be53a5a 100644
  +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  @@ -105,6 +105,21 @@
 diff --git a/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch b/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
-index 027163f..6e0b536 100644
+index 2bdc744..eecccdc 100644
 --- a/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
 +++ b/target/linux/ar71xx/patches-3.18/735-MIPS-ath79-add-support-for-QCA956x-SoC.patch
-@@ -1,6 +1,6 @@
- --- a/arch/mips/ath79/Kconfig
- +++ b/arch/mips/ath79/Kconfig
--@@ -1213,6 +1213,12 @@ config SOC_QCA955X
-+@@ -1248,6 +1248,12 @@ config SOC_QCA955X
-  	select PCI_AR724X if PCI
-  	def_bool n
-  
-@@ -13,7 +13,7 @@
-  config ATH79_DEV_M25P80
-  	select ATH79_DEV_SPI
-  	def_bool n
--@@ -1250,7 +1256,7 @@ config ATH79_DEV_USB
-+@@ -1285,7 +1291,7 @@ config ATH79_DEV_USB
-  	def_bool n
-  
-  config ATH79_DEV_WMAC
 @@ -452,7 +452,7 @@
   		return -ENODEV;
  --- a/arch/mips/ath79/setup.c